a16zFormer Intel CEO: Why This is the Best Time to Build Hardware
a16z
Energy Sets the Pace 0:00
Energy capacity now sets economic capacity. A new data center and a million GPUs do not matter if there is no power for them. That is why more data center projects may default as energy runs short. When technology makes one part easy, the bottleneck moves elsewhere. Nothing is just a chip anymore. It is a rack, and the delay now comes from turning a design into something you can actually use.
Intel To AI Hardware 2:30
Pat Gelsinger recalls getting into Intel from tech school at 18, after winning a scholarship and leaving high school early. He moved from technician to the design team, then worked on the 286, 386, and 486 while also finishing a bachelor’s degree, a master’s, and PhD work. He says that mix of learning by day and building at night made it the best career he could have had. He also says Stanford classes often tested ideas against real industry work, which he sees as part of Silicon Valley’s strength.
New Limits In Design 6:00
He says the 486 helped create modern EDA, the electronic design automation tools used to design chips. Intel had to invent its own hardware description language, build a compiler, and create early placement, routing, and timing tools with Berkeley. Looking at AI chip design now, he thinks many logic parts can be done well with AI tools, but analog design is still hard and needs real silicon data. He expects AI to make design easier, which only pushes the hard part into manufacturing, memory, and power.
Memory Power And Scale 10:00
He says the real bottlenecks are now elsewhere. A chip may be designed in three months, but it can still take nine months before it reaches usable silicon, then more time in advanced 3D packaging and rack-scale assembly. He wants faster lithography and cheaper prototyping flows so designs can move from idea to scale in a month or two. He calls HBM a terrible memory that is still the best available, and says AI is a memory-compute workload that needs better bandwidth, better thermal handling, and far better power modeling and delivery.
Many Chips, One Convergence 13:30
He notes the flood of AI inference accelerator chips and says many teams are making different bets on components, power curves, and design choices. Still, he doubts the market will stay that crowded. He expects the field to converge, because history has rarely seen 100 competing processor vendors in one industry at the same time.
Workloads Keep Shifting 15:01
Compute is splitting into more specialized pieces, from prefill and decode to ideas like midfill. That kind of fine-grained setup does not stay stable for long. Reasoning models may also pull parts of the system back toward CPU-like behavior, while 3D work, molecules, chemicals, and imaging push models beyond flat LLMs and back toward high-performance computing.
Scale Favors Fewer Winners 18:00
Extreme specialization can produce many chips, but not all of them will survive. Big buyers will choose a few winners, and the market will narrow as capital, workloads, and software support concentrate on the designs that scale. Even if the hardware looks different underneath, larger platforms will hide that variety behind abstraction.
Memory Finally Changes 22:00
Memory has stayed stubbornly unchanged for decades, with DRAM, SRAM, and flash still dominating. That may be ending because AI needs far more memory, and because the economics now justify new work. The pressure is also clear in stacked designs, where higher layers demand near-perfect manufacturing, so three, four, or five layers may be the practical sweet spot.
Packaging limits 29:30
The package is already becoming thick with chiplets, two or four memory stacks, power delivery, and smart RDL layers that spread signals across it. That may be about the limit of what manufacturing can handle today. Optics and other materials will have to join the silicon pieces, along with power rails and I/O built into the same construct.
Optics and power 31:00
Thermals stay a hard problem. You need to spread heat better, bring power in and out more efficiently, and use better voltage regulation so you do not create as many hot spots. New materials, better liquid cooling, and other direct cooling methods will matter. For I/O, optics is the direction, but not for the core compute-memory block. Optical-electrical conversions waste too much power, and PIM, or processing in memory, is seen as too limiting for workloads.
All optical networks 35:00
Optics should eventually take over all I/O. Copper is already being pushed to shorter and shorter distances, and for scale-up systems the physics now favors optical links even over short runs. The missing piece is a mature supply chain. In package optics, thermal limits, package integration, and laser capacity still need work, but the shift is expected around 2028 or 2029. AI traffic is also more predictable and flow-like than packet networks, so optical switching fits better than old packet routing.
Energy capacity 43:01
The next bottleneck is power. National energy capacity has lagged for years, with coal coming offline as renewables came on and overall supply barely moving. In an AI era, energy capacity is economic capacity. The need is for much more generation, better delivery, and a stronger ecosystem from the data center back to the grid.
Power Limits AI 44:31
Energy supply is the brake on AI growth. New data centers and million-GPU buys do not matter if they cannot be powered. Nuclear is favored as base load, but renewables still depend heavily on China, gas turbine lead times are long, and more data center projects may default when the power is not there. The speaker wants more U.S. energy capacity, more local supply chains, faster buildout, and better power conversion, including 800-volt DC systems and solid state transformers.
Virtual Machines For Agents 49:00
Virtual machines still matter because every new wave of computing creates a new abstraction. The same idea now has to be rebuilt for AI agents. The questions are no longer only about workloads, storage, and networks, but also about agent security, performance, migration, and policy control. The speaker says the hard part is abstracting both hardware and operations for agents, with humans setting the guard rails and dashboards.
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